what is minimal-gpu-duck-rtl-v0 fr?

oniondas/minimal-gpu-duck-rtl-v0 — explained in plain English

Analysis updated 2026-05-18

★ 3PythonAudience · researcherComplexity · 5/5LicenseSetup · hard

vibe map

mindmap
  root((Minimal GPU RTL))
    What it does
      Simulated hardware GPU
      Renders spinning cube
      Verilog pipeline
    Tech stack
      Verilog
      Python
      Icarus Verilog
      cocotb
    Use cases
      Hardware graphics learning
      Bit exact verification
      FPGA experimentation
    Audience
      Hardware engineers
      Researchers
    Pipeline
      Vertex rotation
      Projection
      Rasterization
      Framebuffer

mindmap root((Minimal GPU RTL)) What it does Simulated hardware GPU Renders spinning cube Verilog pipeline Tech stack Verilog Python Icarus Verilog cocotb Use cases Hardware graphics learning Bit exact verification FPGA experimentation Audience Hardware engineers Researchers Pipeline Vertex rotation Projection Rasterization Framebuffer

what do people make with this?

VIBE 1

Study how a real 3D graphics pipeline, from rotation to rasterization, can be implemented directly in hardware.

VIBE 2

Learn a verification workflow that checks hardware modules bit-for-bit against a Python golden model.

VIBE 3

Use as a teaching example of fixed-point math replacing floating-point in a hardware design.

VIBE 4

Extend the design to load custom 3D models or add lighting as a hardware engineering exercise.

what's the stack?

VerilogPythonIcarus Verilogcocotb

how it stacks up fr

	oniondas/minimal-gpu-duck-rtl-v0	0marildo/imago	0xdfi/glm-5.2-1m-4x-dgx-spark
Stars	3	3	3
Language	Python	Python	Python
Setup difficulty	hard	easy	hard
Complexity	5/5	2/5	5/5
Audience	researcher	general	researcher

Figures from each repo's GitHub metadata at analysis time.

how do i run it?

Difficulty · hard time til it works · 1h+

Requires Icarus Verilog, cocotb, Python 3.10+, and FFmpeg installed to compile, simulate, and render output.

Use freely for any purpose, including commercial use, as long as you keep the copyright notice.

in plain english

This project builds a small graphics processor as real simulated hardware, written in the hardware description language Verilog, that renders a spinning 3D cube. It is not a software renderer written in a normal programming language. Instead, Python's only job is to feed rotation angles into the simulated chip and generate some fixed lookup tables ahead of time. All of the actual rotating, projecting to a flat screen, and drawing of pixels happens inside the simulated hardware itself. The design is organized as a pipeline of hardware modules that pass data from one stage to the next: a module that stores the cube's shape, a module that rotates each point in 3D space, a module that projects those points onto a flat 2D screen, a module that fills in the resulting triangles while handling which surfaces are in front of others, and a module that stores the final image as it is built up pixel by pixel. Every one of these hardware modules is checked against a matching reference version written in plain Python, using a tool called duck-rtl together with a testing framework called cocotb. Nothing is considered trustworthy until the hardware's output matches the Python reference exactly, bit for bit, including a full frame comparison of all 16,384 pixels in the final image. All of the 3D math inside the hardware uses fixed-point numbers instead of the floating-point numbers common in regular software, since hardware doing this kind of math without floating-point support is simpler and faster to design. Running the demo compiles the hardware description, simulates it with the Icarus Verilog simulator, and stitches the resulting frames into an animated GIF or video showing the cube spinning on screen. A roadmap of future goals is listed, including adding basic lighting, allowing arbitrary 3D models to be loaded instead of just the built-in cube, and eventually streaming the rendered pixels out to real display hardware on an FPGA board.

prompts (copy fr)

prompt 1

Explain how the vertex rotation, projection, and rasterization stages of this Verilog GPU pipeline connect together.

prompt 2

Walk me through running render_rtl.py to simulate and render the spinning cube demo.

prompt 3

Help me understand the duck-rtl verification workflow that checks this hardware against a Python model.

prompt 4

Show me how Q15 fixed-point multiplication works in this project's math.

Frequently asked questions